Capacitor electrodes arrangement with oxygen iridium between silicon and oxygen barrier layer

US6573542B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Rainer Bruchhaus · Yokohama, JP
• Nicolas Nagel · Yokohama, JP
• Hermann Wendt · Grasbrunn, DE
• Igor Kasko · Mennecy, FR
• Robert Primig · Hersbruck, DE

Key dates

• Filing date: Jun 25, 2001
• Grant date: Jun 3, 2003
• Expiry date: Jun 25, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D1/682
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

The invention relates to a microelectronic structure. In the structure, an oxygen-containing iridium layer is embedded between a silicon-containing layer and an oxygen barrier layer. The iridium layer is especially produced by a sputter process in an oxygen atmosphere with a low oxygen content. The oxygen-containing iridium layer is stale at temperatures up to 800° C. and withstands the formation of iridium silicide upon contact with the silicon-containing layer. Such micro-electronic structures are preferably used in semiconductor memories.