Patent · US Expired

Circuit configuration for controlling write and read operations in a magnetoresistive memory configuration

US6577528B2 · kind B2 · utility

12Cited by

2References

11Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Dietmar Gogl · South Burlington, US
Helmut Kandolf · Hersbruck, DE
Heinz Honigschmid · Starnberg, DE

Key dates

Filing date	Dec 17, 2001
Grant date	Jun 10, 2003
Priority date	—
Expiry date	Dec 17, 2021

Classification

Technology area (CPC G)Physics
CPC primaryG11C11/15
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A circuit configuration for controlling write operations and read operations in an MRAM memory configuration includes selection transistors grouped in sections of equal numbers of the selection transistors. The selection transistors of each of the sections are jointly connected, at the ends of the bit lines, to a respective interacting pair of read/write amplifiers via those electrode terminals of the selection transistors that are not connected to the bit lines. The read/write amplifiers are controlled such that if a write signal is fed thereto, write currents for writing a logic “1” or “0” flow in a first direction or a second direction in all of the bit lines selected by a corresponding column select signal and, if a read signal is fed in, a logic state stored in one of the magnetoresistive memory cells can be read out.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.