Field effect transistor and method of fabrication
US6579768B2 · kind B2 · utility
5Cited by
1References
9Claims
0Family size
Assignee
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Key dates
| Filing date | Jan 31, 2002 |
| Grant date | Jun 17, 2003 |
| Priority date | — |
| Expiry date | Jan 31, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76235
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An Insulated Gate Field Effect Transistor (IGFET), fabricated using Shallow Trench Isolation (STI), has an edge of a channel region of the IGFET which has a curved shape with a controlled radius of curvature so as to reduce the electric field at the edge of the channel region. A method of controlling the shape of the edge of the channel region is to limit the supply of oxygen to the region at the edge of the channel region during the oxidation process when the side walls of the silicon island, in which the transistor will be formed, are initially covered with a layer of silicon oxide.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.