Bitline splitter
US6580635B1 · kind B1 · utility
0Cited by
4References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 25, 2002 |
| Grant date | Jun 17, 2003 |
| Priority date | — |
| Expiry date | Apr 25, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
During read operations of a column of RAM cells, a bitline is electrically broken into two sections. This reduces the capacitance that needs to be discharged by the RAM cell itself. A buffer is used during the read operation to relay data from one part of the split bitline to the other. A weak pullup path is also provided to hold the non-driven end of the line in a stable condition. During non-read operations, the two sections of bitline are electrically connected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.