Memory cell using amorphous material to stabilize the boundary face between polycrystalline semiconductor material of a capacitor and monocrystalline semiconductor material of a transistor

US6583464B1 · kind B1 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Emmerich Bertagnolli · Munich, DE
• Gustav Beckmann · Radebeul, DE
• Michael Bianco · Malibu, US
• Helmut Klose · Munich, DE

Key dates

• Filing date: Nov 30, 1998
• Grant date: Jun 24, 2003
• Expiry date: Nov 30, 2018

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/37

Abstract

A memory cell array has memory cells in which there is an electrical connection between a polycrystalline semiconductor material of a capacitor electrode and a monocrystalline semiconductor region. Islands made of an amorphous material are disposed in a vicinity of the electrical connection between the polycrystalline semiconductor material and the monocrystalline semiconductor region. The islands are produced in particular by thermally breaking up an amorphous layer which has been formed by thermal oxidation. The memory cell array is in particular a DRAM array with a trench capacitor.