Multi-bit programmable memory cell having multiple anti-fuse elements
US6590797B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 9, 2002 |
| Grant date | Jul 8, 2003 |
| Priority date | — |
| Expiry date | Jan 9, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multi-bit programmable memory cell is provided that includes an access transistor and a plurality of N anti-fuse elements. The access transistor has a source coupled to a source line and a gate coupled to a word line. Each of the anti-fuse elements has a first terminal coupled to a drain of the access transistor, and a second terminal coupled to a corresponding bit line. At most, only one of the anti-fuse elements is programmed. The memory cell is capable of storing M bits, wherein N=2M−1. A method is provided for both programming and reading the memory cell. In another embodiment, the anti-fuse elements can be replaced with mask-programmable elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.