Speculative renaming of data-processor registers
US6591359B1 · kind B1 · utility
28Cited by
3References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 31, 1998 |
| Grant date | Jul 8, 2003 |
| Priority date | — |
| Expiry date | Dec 31, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3842
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A pipelined data processor has instructions at different stages of execution. Some of the instructions specify virtual addresses into a file of registers having physical addresses. A speculative translator maps the virtual registers of an instruction at one pipeline stage into physical registers for speculative use by the instruction at a later pipeline stage. The registers have multiple differently translated regions. Failure of speculative renaming reverts to an archive copy of renaming data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.