Structure and method for forming a body contact for vertical transistor cells
US6593612B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 5, 2000 |
| Grant date | Jul 15, 2003 |
| Priority date | — |
| Expiry date | Dec 25, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/0385
Abstract
A semiconductor memory cell, in accordance with the present invention includes a deep trench formed in a substrate. The deep trench includes a storage node in a lower portion of the deep trench, and a gate conductor formed in an upper portion of the deep trench. The gate conductor is electrically isolated from the storage node. An active area is formed adjacent to the deep trench and is formed in the substrate to provide a channel region of an access transistor of the memory cell. A buried strap is formed to electrically connect the storage node to the active area when the gate conductor is activated. A body contact is formed opposite the deep trench in the active area and corresponding in position to the buried strap to prevent floating body effects due to outdiffusion of the buried strap. Methods for forming the body contact are also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.