Trench DMOS transistor with embedded trench schottky rectifier

US6593620B1 · kind B1 · utility

Assignee

• General Semiconductor, Inc. · US

Inventors

• Fwu-Iuan Hshieh · Saratoga, US
• Yan Man Tsui · Union City, US
• Koon Chong So · Fremont, US

Key dates

• Filing date: Oct 6, 2000
• Grant date: Jul 15, 2003
• Expiry date: Oct 6, 2020

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/0002

Abstract

An integrated circuit having a plurality of trench Schottky barrier rectifiers within one or more rectifier regions and a plurality of trench DMOS transistors within one or more transistor regions. The integrated circuit includes: (a) a substrate of a first conductivity type; (b) an epitaxial layer of the first conductivity type over the substrate, wherein the epitaxial layer has a lower doping level than the substrate; (c) a plurality of body regions of a second conductivity type within the epitaxial layer in the transistor regions; (d) a plurality of trenches within the epitaxial layer in both the transistor regions and the rectifier regions; (e) a first insulating layer that lines the trenches; (t) a polysilicon conductor within the trenches and overlying the first insulating layer; (g) a plurality of source regions of the first conductivity type within the body regions at a location adjacent to the trenches; (h) a second insulating layer over the doped polysilicon layer in the transistor regions; and (i) an electrode layer over both the transistor regions and the rectifier regions.