Segmented write line architecture

US6594191B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Stefan Lammers · Hersbruck, DE
• Christian Arndt · Birkenfeld, DE

Key dates

• Filing date: Dec 13, 2001
• Grant date: Jul 15, 2003
• Expiry date: Dec 13, 2021

Classification

• Technology area (CPC G): Physics
• CPC primary: G11C11/1675
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

This invention presents a novel write line segmentation architecture for writing magnetoresitive random access memories (MRAM). Only the memory cells in a selected segment get a high hard axis field generated by a write line current. Memory cells of deselected segments do not receive this hard axis field. This prevents an undesired state change in particularly sensitive memory cells.