Metal gate electrode using silicidation and method of formation thereof
US6599831B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2002 |
| Grant date | Jul 29, 2003 |
| Priority date | — |
| Expiry date | Apr 30, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device is fabricated by providing a substrate, and providing a dielectric layer on the substrate. A polysilicon body is formed on the dielectric layer, and a metal layer is provided on the polysilicon body. A silicidation process is undertaken to silicidize substantially the entire polysilicon body to form a gate on the dielectric. In an alternative process, a cap layer is provided on the polysilicon body, which cap layer is removed prior to the silicidation process. The polysilicon body is doped with a chosen specie prior to the silicidation process, which dopant, during the silicidation process, is driven toward the dielectric layer to form a gate portion having a high concentration thereof adjacent the dielectric, the type and concentration of this specie being instrumental in determining the work function of the formed gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.