Method and forming fine patterns of semiconductor devices using passivation layers
US6599844B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 22, 2001 |
| Grant date | Jul 29, 2003 |
| Priority date | — |
| Expiry date | Jun 22, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/405
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method is disclosed for forming fine photoresist patterns on semiconductor devices using a modified, two-step dry develop process using a fluorine-containing gas to produce hydrophobic SiOx passivation layers on the sidewalls of the photoresist patterns. These passivation layers increase the structural stability of the fine photoresist patterns and prevent moisture within an air from cohering on the photoresist patterns when the semiconductor substrate is subsequently exposed to the air. Accordingly, the present invention improves the processing margins for very high aspect ratio photoresist patterns resulting in reduced rework and increased yield on very highly integrated semiconductor devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.