Method for ball grid array chip packages having improved testing and stacking characteristics
US6600335B2 · kind B2 · utility
13Cited by
38References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 13, 2001 |
| Grant date | Jul 29, 2003 |
| Priority date | — |
| Expiry date | Nov 13, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A stackable ball grid array (BGA) or fine ball grid array (FBGA) semiconductor package particularly suitable for board-on-chip or chip-on-board applications in which a low profile BGA or FBGA semiconductor package is needed. The stackable ball grid array (BGA) or fine ball grid array (FBGA) provides a semiconductor package that is capable of being burned in and tested in a more efficient and cost effective manner than prior known BGA or FBGA semiconductor packages. A high density, low profile memory module incorporating a plurality of the disclosed BGA or FBGA semiconductor packages in a stacked arrangement is further disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.