Wafer processing method
US6602797B2 · kind B2 · utility
13Cited by
8References
6Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Apr 23, 2002 |
| Grant date | Aug 5, 2003 |
| Priority date | — |
| Expiry date | Apr 23, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/908
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A wafer processing system occupies minimal floor space by using vertically mounted modules such as reactors, load locks, and cooling stations. Further saving in floor space is achieved by using a loading station which employs rotational motion to move a wafer carrier into a load lock. The wafer processing system includes a robot having extension, rotational, and vertical motion for accessing vertically mounted modules. The robot is internally cooled and has a heat resistant end-effector, making the robot compatible with high temperature semiconductor processing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.