Wafer level packaging for making flip-chips
US6605480B2 · kind B2 · utility
2Cited by
4References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 28, 2001 |
| Grant date | Aug 12, 2003 |
| Priority date | — |
| Expiry date | Nov 28, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A wafer level packaging process for making flip-chips and integrated circuits formed are proposed. The process comprises in turn, providing a wafer, forming a protective material, bumping the wafer, removing the protective material, probing the wafer, laser repairing, and dicing the wafer. The laser repairing step is after bumping step. The protective material such as photoresist or metal layer is filled into the depression portions above the fuses for temporary protection of the fuses during bumping.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.