Method for fabricating semiconductor integrated circuit
US6605530B2 · kind B2 · utility
7Cited by
8References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 5, 2002 |
| Grant date | Aug 12, 2003 |
| Priority date | — |
| Expiry date | Nov 5, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The semiconductor device is formed according to the following steps. A TiN film 71 and a W film 72 are deposited on a silicon oxide film 64 including the inside of a via-hole 66 by the CVD method and thereafter, the W film 72 and TiN film 71 on the silicon oxide film 64 are etched back to leave only the inside of the via-hole 66 and form a plug 73. Then, a TiN film 74, Al-alloy film 75, and Ti film 76 are deposited on the silicon oxide film 64 including the surface of the plug 73 by the sputtering method and thereafter, the Ti film 76, Al-alloy film 75, and TiN film 74 are patterned to form second-layer wirings 77 and 78.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.