Methods and systems for flash memory tunnel oxide reliability testing
US6606273B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 11, 2002 |
| Grant date | Aug 12, 2003 |
| Priority date | — |
| Expiry date | Apr 23, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods are disclosed for determining tunnel oxide reliability of flash memory devices in a wafer prior to sorting and packaging without damaging or stressing the devices. The methods comprise measuring an initial threshold voltage of a test cell having the same tunnel oxide as other flash cells on the wafer, applying an erase stress to the test cell for a first time period and a program stress to the test cell for a second time period, and measuring the final threshold voltage of the test cell. The difference between the initial and final threshold voltages is then used to determine or estimate the tunnel oxide reliability of the flash memory cells on the wafer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.