Determination of thermal resistance for field effect transistor formed in SOI technology
US6608352B1 · kind B1 · utility
26Cited by
2References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 25, 2002 |
| Grant date | Aug 19, 2003 |
| Priority date | — |
| Expiry date | Apr 25, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S977/833
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a system for determining thermal resistance of a field effect transistor, a p-n junction is formed with one of drain and source regions of the transistor for determining a current versus temperature characteristic of the p-n junction. A respective temperature of the transistor is determined for each of a plurality of power dissipation levels through the transistor from the current versus temperature characteristic of the p-n junction. The thermal resistance is a rate of change of the temperature with respect to a rate of change of the power dissipation level for the field effect transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.