Profile refinement for integrated circuit metrology
US6609086B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 2002 |
| Grant date | Aug 19, 2003 |
| Priority date | — |
| Expiry date | Mar 24, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/70625
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The present invention includes a method and system for determining the profile of a structure in an integrated circuit from a measured signal, the signal measured off the structure with a metrology device, selecting a best match of the measured signal in a profile data space, the profile data space having data points with a specified extent of non-linearity, and performing a refinement procedure to determine refined profile parameters. One embodiment includes a refinement procedure comprising finding a polyhedron in a function domain of cost functions of the profile library signals and profile parameters and minimizing the total cost function using the weighted average method. Other embodiments include profile parameter refinement procedures using sensitivity analysis, a clustering approach, regression-based methods, localized fine-resolution refinement library method, iterative library refinement method, and other cost optimization or refinement algorithms, procedures, and methods. Refinement of profile parameters may be invoked automatically or invoked based on predetermined criteria such as exceeding an error metric between the measured signal versus the best match profile libra…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.