Double gate semiconductor device having separate gates
US6611029B1 · kind B1 · utility
158Cited by
3References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 8, 2002 |
| Grant date | Aug 26, 2003 |
| Priority date | — |
| Expiry date | Nov 8, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6739
Abstract
A semiconductor device may include a substrate and an insulating layer formed on the subtrate. A fin may be formed on the insulating layer and may include a number of side surfaces and a top surface. A first gate may be formed on the insulating layer proximate to one of the number of side surfaces of the fin. A second gate and may be formed on the insulating layer separate from the first gate and proximate to another one of number of side surfaces of the fin.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.