Circuit configuration with a memory array

US6614700B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Stefan Dietrich · Potsdam, DE
• Peter Schrogmeier · Hersbruck, DE
• Sabine Kieser · Hausham, DE
• Christian Weis · Scheidegg, DE

Key dates

• Filing date: Apr 5, 2002
• Grant date: Sep 2, 2003
• Expiry date: Apr 5, 2022

Classification

• Technology area (CPC G): Physics
• CPC primary: G11C7/22
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

The circuit configuration has a memory array, a memory access controller, a control unit, and an input/output circuit. The control unit outputs a control signal simultaneously to the memory access controller and to the input/output circuit. When the control signal is received, the input/output circuit outputs data to the memory access controller via the data bus. When the control signal is received, the memory access controller stores the data present on the data bus in memory cells of the memory array. Owing to different geometric arrangements and different electrical capacitances, differences in propagation time of the control signals may occur on the path from the control unit to the memory access controller and from the control unit to the input/output circuit. For this purpose, a delay circuit or delay line is provided on the signal path to the memory access controller which brings about a delay of the control signal. This enables precise synchronization of the writing of data into the memory array.