Methods and devices using group III nitride compound semiconductor
US6617668B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 19, 2000 |
| Grant date | Sep 9, 2003 |
| Priority date | — |
| Expiry date | May 19, 2020 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/932
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A layer comprising silicon oxide (SiO2) is formed on (111) plane of a silicon (Si) substrate in a striped pattern which is longer in the [1-10] axis direction perpendicular to the [110] axis direction. Then a group III nitride compound semiconductor represented by a general formula AlxGayIn1-x-yN (0≦x≦1, 0≦y≦1, 0≦x+y≦1) is laminated thereon. The group III nitride compound semiconductor represented by a general formula AlxGayIn1-x-yN (0≦x≦1, 0≦y≦1, 0≦x+y≦1) grows epitaxially on the substrate-exposed regions B which are not covered by the SiO2 layer, and grows epitaxially on the SiO2 layer in lateral direction from the regions B. Consequently, a group III nitride compound semiconductor having no dislocations can be obtained.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.