Method of forming metal silicide regions on a gate electrode and on the source/drain regions of a semiconductor device

US6620718B1 · kind B1 · utility

Assignee

• Advanced Micro Devices, Inc. · US

Inventors

• Karsten Wieczorek · Dresden, DE
• Michael Raab · Salem, DE
• Rolf Stephan · Dresden, DE

Key dates

• Filing date: Apr 25, 2000
• Grant date: Sep 16, 2003
• Expiry date: Apr 25, 2020

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/017

Abstract

The present invention is directed to a method of forming metal silicide regions on a gate electrode (23) and on the source/drain regions (25) of a semiconductor device (100). In one illustrative embodiment, the method comprises forming a gate stack (17) above a semiconducting substrate (20), the gate stack (17) being comprised of a gate electrode (23) and a protective layer (24), forming a plurality of source/drain regions (25) in the substrate (20), and forming a first metal silicide region (28) above each of the source/drain regions (25). The method further comprises removing the protective layer (24) from above the gate electrode (23) and forming a second metal silicide region (31) above the gate electrode (23).