Memory cells with improved reliability
US6621683B1 · kind B1 · utility
0Cited by
9References
32Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 19, 2002 |
| Grant date | Sep 16, 2003 |
| Priority date | — |
| Expiry date | Sep 19, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76895
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A capacitor with improved reliability is disclosed. The capacitor includes a bottom electrode, a top electrode, and an intermediate layer therebetween. A contact, which is electrically coupled to the top electrode, is provided. At least a portion of the contact is offset from the capacitor. By offsetting the contact from the top electrode, the etch damage to the top electrode is reduced, thereby reducing or eliminating the need for the anneal to repair the etch damage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.