Andreas Hilliger
22Patents
6h-index
28Co-inventors
61Inventor score
Filing activity: Sep 18, 2001 → Mar 9, 2006
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6677630B1 | Semiconductor device having ferroelectric film and manufacturing method thereof | Emerging Cross-Sectional Technologies | 8 | Expired |
| US6611449B1 | Contact for memory cells | Electricity | 7 | Expired |
| US6787831B2 | Barrier stack with improved barrier properties | Electricity | 7 | Expired |
| US7071506B2 | Device for inhibiting hydrogen damage in ferroelectric capacitor devices | Electricity | 6 | Expired |
| US6800890B1 | Memory architecture with series grouped by cells | Electricity | 6 | Expired |
| US6724026B2 | Memory architecture with memory cell groups | Electricity | 6 | Expired |
| US6815234B2 | Reducing stress in integrated circuits | Electricity | 4 | Expired |
| US6855565B2 | Semiconductor device having ferroelectric film and manufacturing method thereof | Electricity | 4 | Expired |
| US6946735B2 | Side-wall barrier structure and method of fabrication | Electricity | 4 | Expired |
| US7042705B2 | Sidewall structure and method of fabrication for reducing oxygen diffusion to contact plugs during CW hole reactive ion etch processing | Electricity | 3 | Expired |
| US6906908B1 | Semiconductor device and method of manufacturing the same | Electricity | 3 | Expired |
| US6858442B2 | Ferroelectric memory integrated circuit with improved reliability | Electricity | 3 | Expired |
| US7084027B2 | Method for producing an integrated circuit | Electricity | 2 | Expired |
| US7378700B2 | Self-aligned V0-contact for cell size reduction | Electricity | 1 | Expired |
| US7061035B2 | Self-aligned V0-contact for cell size reduction | Electricity | 1 | Expired |
| US7101785B2 | Formation of a contact in a device, and the device including the contact | Electricity | 1 | Expired |
| US6614642B1 | Capacitor over plug structure | Electricity | 1 | Expired |
| US7042037B1 | Semiconductor device | Electricity | 1 | Expired |
| US6839220B1 | Multi-layer barrier allowing recovery anneal for ferroelectric capacitors | Electricity | 1 | Expired |
| US7009230B2 | Barrier stack with improved barrier properties | Electricity | 0 | Expired |
| US7002196B2 | Ferroelectric capacitor devices and FeRAM devices | Electricity | 0 | Expired |
| US6621683B1 | Memory cells with improved reliability | Electricity | 0 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.