Semiconductor package including isolated ring structure
US6627977B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | May 9, 2002 |
| Grant date | Sep 30, 2003 |
| Priority date | — |
| Expiry date | May 9, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a chip mounting pad having a peripheral edge. The package further includes a semiconductor chip attached to the chip mounting pad. The package further includes a plurality of leads which each have an inner end disposed adjacent the peripheral edge in spaced relation thereto and an opposing distal end. The package includes at least one isolated ring structure electrically connected to the semiconductor chip and at least one of the leads. The ring structure includes a main body portion disposed along the peripheral edge between the peripheral edge and the inner ends of the leads in spaced relation thereto, and at least one stub portion extending angularly from the main body portion along one of the leads in spaced relation thereto.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.