Stacked package structure of image sensor
US6627983B2 · kind B2 · utility
Inventors
Key dates
| Filing date | Jan 24, 2001 |
| Grant date | Sep 30, 2003 |
| Priority date | — |
| Expiry date | Jan 24, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
Abstract
A stacked package structure of an image sensor for electrically connecting to a printed circuit board includes a first substrate, a second substrate, an integrated circuit, an image sensing chip, and a transparent layer. The second substrate is mounted on the first substrate so as to a cavity formed between the first substrate and second substrate. The integrated circuit is located within the cavity and electrically connected the first substrate. The image-sensing chip is arranged on the second substrate. The transparent layer covers over the image sensing chip, wherein the image sensing chip receives image signals via the transparent layer and transforms the image signals into electrical signals transmitted to the first substrate. Thus, the image sensing chip of the image sensing product and the integrated circuit can be integrally package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.