Full-swing source-follower leakage tolerant dynamic logic
US6628143B2 · kind B2 · utility
18Cited by
2References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2001 |
| Grant date | Sep 30, 2003 |
| Priority date | — |
| Expiry date | Sep 26, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0963
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An embodiment of a full-swing, source-follower leakage tolerant dynamic logic gate comprises an nMOSFET logic to conditionally charge a node during an evaluation phase, and to charge the node to a relatively small voltage during the pre-charge phase so that the nMOSFET logic becomes reverse-biased.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.