Method for making three-dimensional metal-insulator-metal capacitors for dynamic random access memory (DRAM) and ferroelectric random access memory (FERAM)
US6630380B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2002 |
| Grant date | Oct 7, 2003 |
| Priority date | — |
| Expiry date | Sep 30, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/682
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for making metal-insulator-metal (MIM) capacitors having insulators with high-dielectric-constant or ferroelectric interelectrode films compatible with the dual-damascene process is achieved. The method of integrating the MIM with a dual-damascene process is to form a planar a first insulating layer and to deposit an etch-stop layer and a second insulating layer. Capacitor node contact openings are etched to the substrate and first recesses are etched to the etch-stop layer. The contact openings and first recesses are filled with a conducting layer using a dual-damascene process. Second recesses are formed in the second insulating layer around the capacitor node contacts. A conformal first metal layer, an interelectrode dielectric layer, and a second metal layer are deposited, and are patterned at the same time to form the capacitors over the node contacts. The second recesses increase the capacitor area while the simultaneous patterning of the metal layers results in fewer processing steps.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.