Method of forming a spin-on-glass insulation layer
US6635586B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 15, 2001 |
| Grant date | Oct 21, 2003 |
| Priority date | — |
| Expiry date | Oct 15, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02222
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a SOG insulation layer of a semiconductor device comprises forming the SOG insulation layer on a substrate having a stepped pattern by using a polysilazane in a solution state, performing a pre-bake process for removing solvent elements of the insulation layer at a temperature of 50 to 350° C., performing a hard bake process for restraining particles from forming at a temperature of 350 to 500° C., and annealing at a temperature of 600 to 1200° C. The method of the invention further includes planarizing the insulation layer between the hard bake process and the annealing step. Also, the hard bake process can be omitted.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.