Method of making resistive memory elements with reduced roughness
US6638774B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 15, 2002 |
| Grant date | Oct 28, 2003 |
| Priority date | — |
| Expiry date | Jan 15, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/161
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A resistive memory element (144), magnetic random access memory (MRAM) device, and methods of manufacturing thereof, wherein a thin oxide layer (132) is disposed within the first metal layer (136) of the memory element (144). The thin oxide layer (132) comprises an oxygen mono-layer. The roughness of subsequently-formed layers (134/118/116) is reduced, and magnetic capabilities of the resistive memory element (144) are enhanced by the use of the thin oxide layer (132) within the first metal layer (136).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.