Patent · US Expired

Configuration and method for the low-loss writing of an MRAM

US6639829B2 · kind B2 · utility

3Cited by

5References

24Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Dietmar Gogl · South Burlington, US
Helmut Kandolf · Hersbruck, DE
Stefan Lammers · Hersbruck, DE

Key dates

Filing date	Aug 3, 2001
Grant date	Oct 28, 2003
Priority date	—
Expiry date	Feb 16, 2022

Classification

Technology area (CPC G)Physics
CPC primaryG11C11/16
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A configuration and method for low-loss writing of an MRAM includes setting voltages at bit lines and word lines such that the voltage across the memory cells between a selected word/bit line and the individual bit line/word lines is minimal. A voltage drop occurs on a selected word/bit line connected to a particular memory cell when writing into the memory cell and voltages at the bit/word lines are set to minimize a cell voltage across the memory cells between a selected word/bit line and individual bit/word lines. A voltage drop occurs on a selected word/bit line connected to a particular memory cell when writing into the particular cell, and, when a voltage V1 and a voltage V2<V1 are present at a respective end of the selected word line/bit lines, the cell field is configured to have all of the bit/word lines set to voltages (V1+V2)/2 and to have a maximum cell voltage of ±(V1−V2)/2.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.