Method for manufacturing a lithographic reticle for transferring an integrated circuit design to a semiconductor wafer
US6649452B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 28, 2002 |
| Grant date | Nov 18, 2003 |
| Priority date | — |
| Expiry date | Feb 28, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F1/36
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A lithographic reticle with subresolution features in the design-pattern is used to control critical dimensions in a semiconductor manufacturing process. After the location of design and processing features is determined, subresolution features are formed in areas devoid of design and processing features. The subresolution features can substantially fill all of the area devoid of design processing features or, instead, selectively fill portions of the area. In one embodiment, the width of the area devoid of design and processing features is less than two times the width of a feature. The presence of the subresolution features results in improved control of small dimensions of features in semiconductor processing, thereby increasing yield and device performance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.