Parallel spiral stacked inductor on semiconductor material
US6650220B2 · kind B2 · utility
15Cited by
5References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 23, 2002 |
| Grant date | Nov 18, 2003 |
| Priority date | — |
| Expiry date | Apr 23, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/4902
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A parallel spiral stacked inductor and manufacturing method therefore is provided. A substrate has a plurality of turns in a plurality of levels, the plurality of turns having a center proximate and a center distal ends. A first plurality of vias connecting the center proximate ends of the plurality of turns and a second plurality of vias connecting the center distal ends of the plurality of turns. A first connecting portion connects to the center proximate ends of the plurality of turns and a second connecting portion connecting to the center distal end of the plurality of turns. A dielectric material contains the inductor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.