Method of determining reliability of semiconductor products
US6653856B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 12, 2002 |
| Grant date | Nov 25, 2003 |
| Priority date | — |
| Expiry date | Jun 22, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2621
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method of determining reliability of semiconductor products. The method comprises providing a semiconductor wafer, which comprises a plurality of MOS transistors formed on its surface, and placing the semiconductor wafer in an environment of a stress temperature during a testing time period. The MOS transistor is simultaneously stressed with a stress voltage. A plurality of testing points are defined in the testing time, and the threshold voltage shift of the MOS transistor is measured at each testing point for establishing a group of experimental data. Finally, a relationship model of threshold voltage shift (&Dgr;Vth) vs. time (t) is provided, and the group of experimental data and the relationship model are used to depict a relation curve for predicting the threshold voltage shift of the MOS transistor when exceeding the testing time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.