Strained silicon MOSFET having silicon source/drain regions and method for its fabrication
US6657223B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 29, 2002 |
| Grant date | Dec 2, 2003 |
| Priority date | — |
| Expiry date | Oct 29, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
Abstract
A strained silicon MOSFET utilizes a strained silicon layer formed on a silicon germanium layer. Strained silicon and silicon germanium are removed at opposing sides of the gate and are replaced by silicon regions. Deep source and drain regions are implanted in the silicon regions, and the depth of the deep source and drain regions does not extend beyond the depth of the silicon regions. By forming the deep source and drain regions in the silicon regions, detrimental effects of the higher dielectric constant and lower band gap of silicon germanium are reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.