Semicondctor package
US6657296B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 25, 2001 |
| Grant date | Dec 2, 2003 |
| Priority date | — |
| Expiry date | Sep 25, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package is proposed, in which at least one chip is mounted on a substrate, and at least one die-attach region is formed on the substrate. A plurality of thermal vias formed in the die-attach region and penetrating the substrate, in a manner that the thermal vias each has a top end connected to the chip mounted on the substrate and a bottom end connected to a thermal pad formed beneath the substrate at a position corresponding to the die-attach region. The thermal pad has a surface directly exposed to the atmosphere, allowing heat generated by the chip to be dissipated through the thermal vias and the exposed surface of the thermal pad to the atmosphere, so as to significantly improve heat dissipating efficiency for the semiconductor package.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.