Method of forming a vertical field-effect transistor device

US6660582B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Albert Birner · Regensburg, DE
• Matthias Goldbach · Dresden, DE

Key dates

• Filing date: Oct 15, 2002
• Grant date: Dec 9, 2003
• Expiry date: Oct 15, 2022

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/0385

Abstract

It is proposed when forming field-effect transistor devices in a semiconductor substrate for the overlapping region of a source-drain region that is to be provided to be formed directly as a material region, in particular with outdiffusion processes being avoided to the greatest extent. This takes place in particular by forming the connection region or buried-strap region as selectively epitaxially grown-on single-crystal, possibly doped silicon.