Plastic semiconductor package
US6661083B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 22, 2002 |
| Grant date | Dec 9, 2003 |
| Priority date | — |
| Expiry date | Feb 25, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A lead frame for a surface mount semiconductor chip package includes a die attach paddle and leads, the die attach paddle having down bond attachment sites on an upper surface of the paddle near a peripheral margin of the paddle, and having a central die attach region on an upper surface of the paddle, wherein a portion of the upper surface of the paddle is recessed. In some embodiments the recessed portion of the upper surface of the paddle includes the die attach region, and in other embodiments the recessed portion of the upper surface of the paddle includes a groove. Also, a lead frame surface mount chip package including such a lead frame.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.