Flynn Carson
45Patents
14h-index
58Co-inventors
84Inventor score
Filing activity: Apr 10, 1996 → Dec 8, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7429786B2 | Semiconductor package including second substrate and having exposed substrate surfaces on upper and lower sides | Electricity | 142 | Active |
| US7053477B2 | Semiconductor multi-package module having inverted bump chip carrier second package | Electricity | 91 | Expired |
| US6967126B2 | Method for manufacturing plastic ball grid array with integral heatsink | Electricity | 67 | Expired |
| US7354800B2 | Method of fabricating a stacked integrated circuit package system | Electricity | 64 | Active |
| US6661083B2 | Plastic semiconductor package | Electricity | 52 | Expired |
| US7253511B2 | Semiconductor multipackage module including die and inverted land grid array package stacked over ball grid array package | Electricity | 40 | Expired |
| US7247519B2 | Method for making a semiconductor multi-package module having inverted bump chip carrier second package | Electricity | 28 | Expired |
| US8110441B2 | Method of electrically connecting a shielding layer to ground through a conductive via disposed in peripheral region around semiconductor die | Electricity | 26 | Active |
| US5868301A | Semiconductor inner lead bonding tool | Electricity | 26 | Expired |
| US8067268B2 | Stacked integrated circuit package system and method for manufacturing thereof | Electricity | 23 | Active |
| US9721903B2 | Vertical interconnects for self shielded system in package (SiP) modules | Electricity | 23 | Active |
| US7750454B2 | Stacked integrated circuit package system | Electricity | 20 | Active |
| US9589936B2 | 3D integration of fanout wafer level packages | Electricity | 18 | Active |
| US9679801B2 | Dual molded stack TSV package | Electricity | 15 | Active |
| US8598690B2 | Semiconductor device having conductive vias in peripheral region connecting shielding layer to ground | Electricity | 13 | Active |
| US7494847B2 | Method for making a semiconductor multi-package module having inverted wire bond carrier second package | Electricity | 11 | Active |
| US7692279B2 | Semiconductor multipackage module including die and inverted land grid array package stacked over ball grid array package | Electricity | 11 | Active |
| US8409920B2 | Integrated circuit package system for package stacking and method of manufacture therefor | Electricity | 10 | Active |
| US6614123B2 | Plastic ball grid array package with integral heatsink | Electricity | 9 | Expired |
| US7687315B2 | Stacked integrated circuit package system and method of manufacture therefor | Electricity | 8 | Active |
| US6468830B1 | Compliant semiconductor package with anisotropic conductive material interconnects and methods therefor | Electricity | 8 | Expired |
| US8723302B2 | Integrated circuit package system with input/output expansion | Electricity | 8 | Active |
| US9484279B2 | Semiconductor device and method of forming EMI shielding layer with conductive material around semiconductor die | Electricity | 6 | Active |
| US9236319B2 | Stacked integrated circuit package system | Electricity | 4 | Active |
| US6791169B2 | Compliant semiconductor package with anisotropic conductive material interconnects and methods therefor | Electricity | 4 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.