Single electron memory device comprising quantum dots between gate electrode and single electron storage element and method for manufacturing the same
US6670670B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 19, 2002 |
| Grant date | Dec 30, 2003 |
| Priority date | — |
| Expiry date | Apr 19, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2216/08
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A single electron memory device including quantum dots between a gate electrode and a single electron storage element and a method for manufacturing the same, wherein the single electron memory device includes a substrate on which a nano-scale channel region is formed between a source and a drain, and a gate lamination pattern including quantum dots on the channel region. The gate lamination pattern includes a lower layer formed on the channel region, a single electron storage medium storing a single electron tunneling through the lower layer formed on the lower layer, an upper layer including quantum dots formed on the single electron storage medium, and a gate electrode formed on the upper layer to be in contact with the quantum dots.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.