Control of the deposition temperature to reduce the via and contact resistance of Ti and TiN deposited using ionized PVD techniques
US6673716B1 · kind B1 · utility
71Cited by
6References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 30, 2002 |
| Grant date | Jan 6, 2004 |
| Priority date | — |
| Expiry date | Feb 5, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/2855
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of depositing thin films comprising Ti and TiN within vias and trenches having high aspect ratio openings. The Ti and TiN layers are formed on an integrated circuit substrate using a Ti target in a non-nitrided mode in a hollow cathode magnetron apparatus in combination with controlling the deposition temperatures by integrating cooling steps into the Ti/TiN deposition processes to modulate the via and contact resistance. The Ti and TiN layers are deposited within a single deposition chamber, without the use of a collimator or a shutter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.