Method for filling trenches in integrated semiconductor circuits

US6677218B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Markus Kirchhoff · Radeberg, DE
• Martin Schrems · Langenbruck, DE

Key dates

• Filing date: Jul 31, 2002
• Grant date: Jan 13, 2004
• Expiry date: Jul 31, 2022

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/0387
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method in which a recess is formed in the surface of a semiconductor substrate and a material is grown on the inner wall of the recess, includes the steps of producing an electrically insulating layer on the surface of the substrate outside the recess, and selectively growing the material on the inner wall of the recess as a result of the substrate, as an electrode, being brought into contact with an electrolysis liquid and electrolysis being carried out, during which the insulating layer prevents the material from growing outside the recess. Before the electrolysis is carried out, a reserve material is epitaxially deposited on the inner wall of the recess and, during the electrolysis, the reserve material is converted into the material being grown by electrolysis.