Method and a system for sealing an epitaxial silicon layer on a substrate
US6685779B2 · kind B2 · utility
2Cited by
45References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2002 |
| Grant date | Feb 3, 2004 |
| Priority date | — |
| Expiry date | Feb 11, 2022 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S414/139
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to one aspect of the invention, a method of processing a wafer is provided. The wafer is located in a wafer processing chamber of a system for processing a wafer. A silicon layer is then formed on the wafer while the wafer is located in the wafer processing chamber. The wafer is then transferred from the wafer processing chamber to a loadlock chamber of the system. Communication between the processing chamber and the loadlock chamber is closed off. The wafer is then exposed to ozone gas while located in the loadlock chamber, whereafter the wafer is removed from the loadlock chamber out of the system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.