Shallow trench isolation planarization using self aligned isotropic etch
US6686283B1 · kind B1 · utility
4Cited by
7References
34Claims
0Family size
Assignee
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Key dates
| Filing date | Feb 4, 2000 |
| Grant date | Feb 3, 2004 |
| Priority date | — |
| Expiry date | Feb 4, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31056
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming planar isolation structures for integrated circuits. A etch barrier is formed over the isolation fill material and an etch back is performed to remove material above unetched portions of the substrate. The exposed fill material is etched and planarized to form a planar isolation structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.