Method of manufacturing a semiconductor integrated circuit device and a semiconductor integrated circuit device
US6693008B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | Nov 13, 2000 |
| Grant date | Feb 17, 2004 |
| Priority date | — |
| Expiry date | Nov 13, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/315
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In order to fill in an isolation trench formed on a semiconductor substrate, the isolation trench is filled up to a predetermined middle position with a coating film first, and then an insulating film formed by a CVD method is deposited thereon. Additionally, the insulating film is polished by a CMP method, for example, so as to be ground. Thus, the isolation trench is filled with stacked films of the coating film and the insulating film. Further, an electrode pattern and a dummy pattern are formed on the semiconductor substrate, and the trench formed between these patterns is filled up to a predetermined middle position in its depth direction with the coating film. Then, a remaining depth portion of the trench is filled with the insulating film formed by a CVD method.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.