Device and method for detecting alignment of bit lines and bit line contacts in DRAM devices
US6693834B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 29, 2003 |
| Grant date | Feb 17, 2004 |
| Priority date | — |
| Expiry date | May 29, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/401
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and device for detecting alignment of bit lines and bit line contacts in DRAM devices. In the present invention, the test device is disposed in the scribe line region and is formed by the same masks and process as the bit lines and bit line contacts in the memory regions simultaneously. The memory deices and test may have the same alignment shift between bit line contacts and bit line due to use of the same masks and process. Thus, alignment of bit lines and bit line contacts in the memory region is determined according to two resistances (R1 and R2) detected by the test device. Further, the alignment shift can be obtained by wherein RMO is the resistance per surface area of the bit lines, and L is the length of the bar-type bit line contacts in the test device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.