Method and apparatus for fault model analysis in manufacturing tools
US6697691B1 · kind B1 · utility
8Cited by
5References
42Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 3, 2000 |
| Grant date | Feb 24, 2004 |
| Priority date | — |
| Expiry date | Jan 3, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/20
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides for a method and an apparatus for fault model analysis in manufacturing tools. A sequence of semiconductor devices is processed through a manufacturing process. Production data resulting from the processing of the semiconductor devices is acquired. A fault model analysis is performed using the acquired production data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.