Method for operating a memory device
US6700818B2 · kind B2 · utility
37Cited by
6References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 5, 2002 |
| Grant date | Mar 2, 2004 |
| Priority date | — |
| Expiry date | Aug 5, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3436
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for operating bits of memory cells in a memory array, the method including applying operating pulses to bits of a sample of memory cells, determining a response of at least one of an electrical, physical and mechanical property (e.g., threshold voltage) of the bits to the operating pulses, and applying at least one further operating pulse to the rest of the array, the at least one further operating pulse being a function of the response.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.