Ferroelectric transistor
US6707082B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 2002 |
| Grant date | Mar 16, 2004 |
| Priority date | — |
| Expiry date | Mar 28, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/684
Abstract
In a ferroelectric transistor containing two source/drain zones with a channel region disposed there-between, a first dielectric intermediate layer containing Al2O3 is disposed on a surface of the channel region. A ferroelectric layer and a gate electrode are disposed above the first dielectric intermediate layer. The utilization of Al2O3 in the first dielectric intermediate layer results in the suppression of tunneling of compensation charges from the channel region into the first dielectric layer and thereby improves the time for data storage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.